1. Field of the Invention
The present invention relates to a method of forming a T-gate structure for a microelectronic device such as a high-electron mobility transistor (HEMT) on the surface of a substrate.
2. Description of the Related Art
The HEMT is a variant of gallium arsenide field effect transistor (FET) technology that offers substantially better performance than standard metal-semiconductor field effect transistor (MESFET) devices, particularly at low temperatures. HEMT substrates are usually fabricated by molecular beam epitaxy (MBE), in which the device layers are built up by deposition of molecules in a vacuum. A conventional HEMT uses an undoped gallium arsenide (GaAs) channel which is supplied with electrons by a thin aluminum gallium arsenide (AlGaAs) doping layer between the channel and the controlling gate electrode. This separation of the channel dopant layer, where electron scattering is high, from the channel itself, significantly increases the mobility of the electrons in the channel. It is the high mobility of the carriers that provides the fundamental advantage of HEMT technology over conventional MESFET devices in high frequency operation.
In order to achieve the highest frequency operation from HEMT devices, it is also necessary to reduce the distances over which the gate's field effect control of the electrons in the channel must take place, thereby reducing the parasitic resistances and capacitances that limit device speed. The primary critical dimension concerned is the length of the gate electrode itself, which defines the distance the electrons must traverse underneath the gate during the operation of the device. A shorter gate length decreases the transit time for carriers in the channel, however, it also increases the series resistance of the gate electrode itself, slowing down the device. Therefore, it is desirable for a HEMT device to have a T-shaped gate, in order to provide a short gate length to the channel in combination with a wide upper cross section for low gate series resistance.
The conventional method of forming a T-gate structure relies on either a two layer or three layer resist technology in combination with electron beam exposure. In the two layer, or bilevel resist technique, the upper layer is more sensitive to the electron beam exposure, while the lower layer is less sensitive. When exposed with an electron beam and developed, the upper more sensitive layer develops into a wide cavity, while the lower layer develops to a narrower width, creating a "wine goblet" shaped cavity. Metal is deposited onto the substrate which fills the cavity and forms the desired T-shaped gate therein. The resist layers and overlying metal are removed by dissolving the resist layers and lifting off the metal, leaving the T-gate structure on the surface of the substrate.
In the three layer electron beam resist approach, an additional less sensitive layer is added to the top of the resist. After exposure, this uppermost layer develops to a slightly narrower width than more sensitive layer underneath it, creating a slight overhang, or retrograde profile to the cavity in the resist. After metal deposition, this retrograde profile improves the separation between the metal filling the resist cavity and that overlying the resist, facilitating the lift off removal process. This method is described in an article entitled "Electron Beam Fabrication of GaAs Low-Noise MESFETS Using a New Trilayer Resist Technique", by P. Chao et al, in IEEE Transactions on Electron Devices, Vol. ED-32, No. 6, Jun. 1985, pp 1042-1046.
The bilevel and trilevel resist methods with electron
beam exposure have been used to fabricate T-gate structures with gate lengths as short as approximately 50 nm. This has enabled the fabrication of HEMTs with current-gain cutoff frequency f.sub.T of up to 250 GHz. However, both of these methods are inherently limited in resolution since the gate length is defined at the bottom of the resist structure, after the electron beam has passed through the entire thickness of the resist layers. Since the extremely light electrons are scattered as the beam passes through the resist, the resolution of the exposure degrades by the time the beam reaches the bottom of the resist. Although higher resolution can be obtained in thin resist imaging layers, there have not been any practical methods proposed to date of providing a thin imaging layer technique for fabricating T-Gate structures.